ERS-210 Hardware - CPU and memory |
The main block of the ERS-210 AIBO is an engineering marvel.
It is much smaller than the ERS-111 AIBO, has fewer circuit boards and integrates the mechanical components (battery holder / lock / release, memory stick holder / lock / release, 6 appendage release mechanisms, many Open-R ports and a PCMCIA slot) in an amazingly tight space.
The Main Chips
CPU
The CPU is a QED (Quantum Effective Devices) MIPS processor, part number RM5231A-200H. It uses the MIPS IV instruction set, 32-bit data bus, and has a maximum speed of 200MHz.Memory
Dynamic memory is in two NEC D4518163G5-A80 memory chips giving a total of 32MB of memory. This is SDRAM.Read only memory is in single Toshiba TC58FVB321FT-10 flash memory chip giving a total of 4MB of flash ROM.
I/O Controller
There is a separate 8-bit micro-controller that performs I/O functions as well as controlling the main CPU (including powering it up and acting like a watch-dog). The chip is an NEC D780023AY running at 4MHz. It is an 8-bit micro-controller with 24KB of ROM and 1KB of RAM, an analog-to-digital converter, a real-time-clock, a buzzer circuit (for the boot failure tune) and two serial ports (among other features).Specs
Here are the main chips:- 200MHz MIPS CPU from QED
- 8-bit Micro-controller from NEC
- 16MB SDRAM from from NEC
- Toshiba 4M Flash ROM
- Texas Instrument USB controller chip